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DC poleHodnotaJazyk
dc.contributor.authorKubáň, Marián
dc.contributor.editorPihera, Josef
dc.contributor.editorSteiner, František
dc.date.accessioned2015-01-19T09:39:09Z
dc.date.available2015-01-19T09:39:09Z
dc.date.issued2014
dc.identifier.citationElectroscope. 2014, č. 3, EDS 2014.cs
dc.identifier.issn1802-4564
dc.identifier.urihttp://147.228.94.30/images/PDF/Rocnik2014/Cislo3_2014/r8c3c6.pdf
dc.identifier.urihttp://hdl.handle.net/11025/11822
dc.format4 s.cs
dc.format.mimetypeapplication/pdf
dc.language.isoenen
dc.publisherZápadočeská univerzita v Plzni, Fakulta elektrotechnickács
dc.relation.ispartofseriesElectroscopecs
dc.rightsCopyright © 2014 Electroscope. All Rights Reserved.en
dc.subjectproudové měničecs
dc.subjectautomobilové aplikacecs
dc.subjecttechnologie CMOScs
dc.subjectelektrická měřenícs
dc.titleDual 11-Bit Current-Steering D/A Converter for the Transmission of I-Q Encoded Informationen
dc.typečlánekcs
dc.typearticleen
dc.rights.accessopenAccessen
dc.type.versionpublishedVersionen
dc.description.abstract-translatedThis paper presents the design of an 11-bit dual D/A converter for the transmission of I-Q encoded information. The intended field of application is the automotive industry. Therefore the specific environmental hazards had to be considered, primarily the wide operating temperature range. The design is in the ON Semiconductor smart power 350 nm CMOS technology. The main function of the converter is to transmit information encoded into I-Q signal representation. The I and Q signal paths are in reality represented with sine and cosine signals. In addition, this information can have the maximum change rate of 3000 rps. The decomposition of transmitted information is expected to occur at the receiver side in the I-Q decoder block. To comply with these requirements the D/A converter has to be dual (sine and cosine), bipolar and of a segmented current-steering architecture (best accuracy/area tradeoff). Goals have been respectively selected to have DNL < ± 0.5 LSB (to guarantee monotonicity) and INL < ± 3 LSB in order to achieve acceptable linearity. Channel gain mismatch has to be better than 1 % to fulfill the dual channel accuracy requirement, calculated from the sensitivity of the output error on the signal amplitude mismatch. Special attention has been paid to the layout placement of the current steering matrix elements and to the switching strategy as well. The article provides design overview with the measurement results of the manufactured prototype.en
dc.subject.translatedcurrent convertersen
dc.subject.translatedautomotive applicationen
dc.subject.translatedCMOS technologyen
dc.subject.translatedelectrical measurementsen
dc.type.statusPeer-revieweden
Vyskytuje se v kolekcích:Číslo 3 (2014)
Číslo 3 (2014)

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Použijte tento identifikátor k citaci nebo jako odkaz na tento záznam: http://hdl.handle.net/11025/11822

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  1. DSpace at University of West Bohemia
  2. Publikace ZČU / UWB Publications
  3. Časopisy ZČU / UWB Journals
  4. Electroscope
  5. Ročník 2014
  6. Číslo 3 (2014)