| Title: | Reduction of divider circuit errors |
| Authors: | Pilśniak, Adam Holajn, Piotr |
| Citation: | CPEE – AMTEE 2013: Joint conference Computational Problems of Electrical Engineering and Advanced Methods of the Theory of Electrical Engineering: 4th – 6th September 2013 Roztoky u Křivoklátu, Czech Republic, p. III-5. |
| Issue Date: | 2013 |
| Publisher: | University of West Bohemia |
| Document type: | konferenční příspěvek conferenceObject |
| URI: | http://hdl.handle.net/11025/11619 |
| ISBN: | 978-80-261-0247-2 |
| Keywords: | transkonduktanční násobičky;analogové děliče;kompenzace chyb |
| Keywords in different language: | transconductance multipliers;analog dividers;error compensation |
| Abstract: | The analog divider based on transconductance multiplier is analyzed to determine its uncertainty due to voltage offsets. In the paper is shown, the divider errors can be reduced. |
| Rights: | © University of West Bohemia |
| Appears in Collections: | CPEE – AMTEE 2013 CPEE – AMTEE 2013 |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Pilsniak_1.pdf | Plný text | 49,76 kB | Adobe PDF | View/Open |
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