Full metadata record
DC pole | Hodnota | Jazyk |
---|---|---|
dc.contributor.author | Pozzobon, Enrico | |
dc.contributor.author | Renner, Sebastian | |
dc.contributor.author | Mottok, Jürgen | |
dc.contributor.author | Matoušek, Václav | |
dc.contributor.editor | Pinker, Jiří | |
dc.date.accessioned | 2022-11-04T09:13:28Z | |
dc.date.available | 2022-11-04T09:13:28Z | |
dc.date.issued | 2022 | |
dc.identifier.citation | 2022 International Conference on Applied Electronics: Pilsen, 6th – 7th September 2022, Czech Republic, p. 133-136. | en |
dc.identifier.isbn | 978-1-6654-9482-3 | |
dc.identifier.uri | http://hdl.handle.net/11025/49867 | |
dc.format | 4 s. | cs |
dc.format.mimetype | application/pdf | |
dc.language.iso | en | en |
dc.publisher | Fakulta elektrotechnická ZČU | cs |
dc.rights | © IEEE | en |
dc.subject | Booleovské maskování | cs |
dc.subject | modulární doplněk | cs |
dc.subject | boční kanál | cs |
dc.subject | rozkouskovaný | cs |
dc.subject | ARM Thumb | cs |
dc.title | An optimized Bitsliced Masked Adder for ARM Thumb-2 Controllers | en |
dc.type | konferenční příspěvek | cs |
dc.type | conferenceObject | en |
dc.rights.access | openAccess | en |
dc.type.version | publishedVersion | en |
dc.description.abstract-translated | The modular addition is used as a non-linear operation in ARX ciphers because it achieves the requirement of introducing non-linearity in a cryptographic primitive while only taking one clock cycle to execute on most modern archi- tectures. This makes ARX ciphers especially fast in software implementations, but comes at the cost of making it harder to protect against side-channel information leakages using Boolean masking: the best known 2-shares masked adder for ARM Thumb micro-controllers takes 83 instructions to add two 32-bit numbers together. Our approach is to operate in bitsliced mode, performing 32 additions in parallel on a 32-bit microcontroller. We show that, even after taking into account the cost of bitslicing before and after the encryption, it is possible to achieve a higher throughput on the tested ciphers (CRAX and ChaCha20) when operating in bitsliced mode. Furthermore, we prove that no first-order information leakage is happening in either simulated power traces and power traces acquired from real hardware, after sufficient countermeasures are put into place to guard against pipeline leakages. | en |
dc.subject.translated | Boolean masking | en |
dc.subject.translated | modular addition | en |
dc.subject.translated | side- channel | en |
dc.subject.translated | bitsliced | en |
dc.subject.translated | ARM Thumb | en |
dc.type.status | Peer-reviewed | en |
Vyskytuje se v kolekcích: | Konferenční příspěvky / Conference Papers (KIV) Applied Electronics 2022 Applied Electronics 2022 |
Soubory připojené k záznamu:
Soubor | Popis | Velikost | Formát | |
---|---|---|---|---|
uvod.pdf | Plný text | 1,61 MB | Adobe PDF | Zobrazit/otevřít |
An_optimized_Bitsliced_Masked_Adder_for_ARM_Thumb-2_Controllers.pdf | Plný text | 1,13 MB | Adobe PDF | Zobrazit/otevřít |
Použijte tento identifikátor k citaci nebo jako odkaz na tento záznam:
http://hdl.handle.net/11025/49867
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